Grafton Technology

Process Engineer

Job Reference: GTL-2020-01-101

Location: Delft, Netherlands

Our client seeking to hire a process engineer to help further the development of its leading edge  photosensor technology. The candidate will help define the process, optimize the fabrication process to reach target performance, and fabricate engineering test devices for a specific customer project. In the first 3 months the process flow for current fabrication of current generation devices will be optimized. In the first 6 months first engineering devices will fabricated and tested for customer 

evaluation. In the first year the following new sensor generation will be defined and engineering devices fabricated.

Key Responsibilities:

  • Candidate will carry out process development of CMOS sensors.
  • Candidate will design, manage and execute batches to understand the performance of our client’s sensor technology, including design of experiments, skew lot and analysis. 
  • Optimization of individual processing steps to achieve target optical and electrical characteristics of our client’s sensor technology.

Required Experience:

  • Work will be carried out in a class 100 clean room, experience with standard silicon processing is a requirement.
  • Day to day work will be processing wafers in a CMOS R&D wafer fab.
  • Must have experience with CMOS fabrication techniques and tools, for example: 
  • RIE etching
  • Plasma Enhanced Deposition sputtering
  • Mask aligner lithography tools
  • stepper lithography tools
  • spinner
  • Thermal growth ovens
  • Curing ovens
  • Experience with the standard CMOS wet bench cleaning with commonly used acids, bases and organic solvents.
  • Familiarity with common CMOS characterization and inspection tools including microscope, profilometer, optical interferometer (transparent layer thickness determination), Ellipsometer.
  • Must have familiarity with the safety requirements for working in a CMOS fab.
  • Electrical test at wafer level on a probe station (eg. Cascade system, Agilent semiconductor analyzer).
  • Experience with PECVD Silicon growth a plus, including high level characterization tools specific to photovoltaics including quantum efficiency, spectral range, and thin film quality determination using Raman spectroscopy.
  • Be able to set up design of experiments, use descriptive statistics for lot analysis, and be able to construct skew experiments for process optimization.
  • Engineering or physics degree at Master’s level.
  • Prior clean room processing experience.  
  • Must be familiar with silicon CMOS processing techniques.
  • Must be dynamic, motivated, excellent problem solver who can work independently and in small teams, and willing to travel if needed.
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